I needed this for a new CX4 we’re setting up at work, so this is pretty much documentation so I can refer back to it later on…It might help you too!

—-From Powerlink—-

The CLARiiON CX4 Series supports many more SP ports. As such the original method of specifying the Ports would cause an overlap between SP A high end ports and SP B low end ports.

That is, SPA9 would have the significant byte pair as 69, which is SPB1.
The new method is as follows :

SPA0-7 and SPB0-7 are the same as the old method.

Port SP A SP B
00 50:06:01:60:BB:20:02:07 50:06:01:68:BB:20:02:07
01 50:06:01:61:BB:20:02:07 50:06:01:69:BB:20:02:07
02 50:06:01:62:BB:20:02:07 50:06:01:6A:BB:20:02:07
03 50:06:01:63:BB:20:02:07 50:06:01:6B:BB:20:02:07
04 50:06:01:64:BB:20:02:07 50:06:01:6C:BB:20:02:07
05 50:06:01:65:BB:20:02:07 50:06:01:6D:BB:20:02:07
06 50:06:01:66:BB:20:02:07 50:06:01:6E:BB:20:02:07
07 50:06:01:67:BB:20:02:07 50:06:01:6F:BB:20:02:07

For the higher port numbers byte 12 is changed to represent the higher ports thus:

0 0-7
4 8-15
8 16-23
C 24-31

And the 8th byte cycles back to 0-7 for SP A and 8-F for SP B. So for ports 8-11 on SP A and SP B we have:

Port SP A SP B
08 50:06:01:60:BB:24:02:07 50:06:01:68:BB:24:02:07
09 50:06:01:61:BB:24:02:07 50:06:01:69:BB:24:02:07
10 50:06:01:62:BB:24:02:07 50:06:01:6A:BB:24:02:07
11 50:06:01:63:BB:24:02:07 50:06:01:6B:BB:24:02:07